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运算放大器参数的解析

运算放大器参数的解析

 

集成运算放大器是模拟集成电路的基本器件,发展最早,主要应用于模拟 数学运算,信号发生,放大,有源滤波,直流稳压等

集成运算放大电路:首先用于信号的运算,简称集成运放,是一个高性能的直接耦合多级放大电路。

(1)直接耦合方式:充分利用管子性能良好的一致性采用差动放大电路和电流源电路。

(2)用复杂电路实现高性能的放大电路,因为电路的复杂化并不带来工艺的复杂性。

(3)用有源元件替代无源元件,如用晶体管取代难于制作的大电阻

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图 1 运算放大器的结构

输入级:前置级,多采用差动放大电路,抑制零漂。要求Ri大,输入端耐压高

中间级:主放大级,多采用共射放大电路。要求有足够的放大能力

输出级:功率级,多采用准互补输出级。要求Ro小,最大不失真输出电压尽可能大

偏臵电路:各级设臵合适的静态工作点。采用电流源电路

若将集成运放看成为一个‚“黑盒子”,则可等效为一个双端输入、单端输出的差动放大电路

把输入信号分成共模信号(相同部分)和差模信号(不同部分)

V=

差模增益和共模增益:将放大器对原输入信号的放大能力,等效为对差模信号和对共模信号的放大能力

V=

差动增益 V=

不仅与电路有关,还与输入信号有关,这与基本线性放大电路的交流性能指标不同

共模抑制比CMRR:V=

CMRR表明一个差动放大器对共模信号的抑制能力,实际应用时微弱信号通常以差模形式传输,而干扰一般是共模的,CMRR越大表明放大电路抗干扰的能力越强

GB可降低稳态误差。 摆率 slew rate允许放大更高频率和幅度的信号。 压摆率通常以伏特/微秒为单位

压摆率规范确保输出信号转换的速度至少为给定的最小值,或至多为给定的最大值

在放大器中,压摆率能力的限制会引起非线性效应。 为了使正弦波不受摆率限制,放大器中所有点的摆率能力(以伏特/秒为单位)必须满足以下条件:

SR>= 2pai fpk;

其中f是工作频率,pk是波形的峰值幅度

现代放大器的输入级通常是具有跨导特性的差分放大器。这意味着输入级采用差分输入电压,并向第二级产生输出电流。 跨导通常很高-这是产生放大器大开环增益的地方。这也意味着相当小的输入电压会导致输入级饱和。在饱和状态下,该级产生几乎恒定的输出电流。 除其他事项外,现代功率放大器的第二阶段是完成频率补偿。该阶段的低通特性近似于一个积分器。因此,恒定电流输入将产生线性增加的输出。如果第二级具有有效的输入电容C和电压增益A_2,则本示例中的压摆率可以表示为:

SR= Isat*A_2 / C

这里 Isat是处于饱和状态的第一级的输出电流。

摆率有助于我们确定适用于放大器的最大输入频率和幅度,以使输出不会明显失真。因此,在将其用于高频应用之前,有必要检查数据手册中的压摆率。

Gain–BandWidth product (designated as GBWP, GBW, GBP, or GB) 是放大器带宽与测量带宽时的增益的乘积

对于设计为具有简单单极点频率响应的器件(例如运算放大器),增益带宽积几乎与测量增益无关。 在此类设备中,增益带宽乘积也将等于放大器的单位增益带宽(放大器增益至少为1的带宽)。对于负反馈将增益降至开环增益以下的放大器,闭环放大器的增益带宽积将近似等于开环放大器的增益带宽积

表征运算放大器增益的频率依赖性的参数是有限增益-带宽乘积

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通常为运算放大器指定该数量,并允许电路设计人员确定在给定频率(或带宽)下可以从器件中提取的最大增益,反之亦然。

将LC电路添加到放大器的输入和输出时,增益会增加,带宽会减小,但是乘积通常受增益带宽乘积的限制。 例子 如果运算放大器的GBWP为1 MHz,则意味着该器件的增益在1 MHz时下降为1。因此,在为单位增益连接设备时,它将在不使信号过度失真的情况下,以高达1 MHz的频率工作(GBWP =增益×带宽,因此,如果BW = 1 MHz,则增益= 1)。根据GBW乘积公式,连接增益为10的同一设备只能在高达100 kHz的频率下工作。此外,如果最大工作频率为1 Hz,则可以从设备中提取的最大增益为1×106

我们还可以分析地表明,对于 w>>wc,GBWP是恒定的。

为一阶传递函数,由下式给出:

一个OTA的效率可用其FOM值的大小来评价,FOM的定义为:

FOM = GBW(MHz)*CL(pF)/Itotal(mA)

理想的运算放大器通常被认为具有以下特征:

无限开环增益G = vout / vin

输入阻抗Rin无限大,因此输入电流为零

零输入失调电压 无

限的输出电压范围

具有零相移和无限压摆率的无限带宽

零输出阻抗Rout

零噪音

无限共模抑制比(CMRR)

无限电源抑制比。

这些理想可以归纳为两个“黄金法则”: 在闭环中,输出尝试执行使输入之间的电压差为零的所有必要操作。 输入不消耗电流。[6]:177

Phase Margin:

Typically they would cross unity at a somewhat lower but still acceptable phase margin like 60 degrees. Then with a feedback factor of unity, the phase margin of the system IS the phase margin of the op-amp open loop characteristic, and the bandwith (closed loop pole) moves out to the open loop crossover.

通常,它们会以稍低但仍可接受的相位裕度(如 60 度)交叉统一。 然后在反馈因子为 1 的情况下,系统的相位裕度是运算放大器开环特性的相位裕度,带宽(闭环极点)移出至开环交叉点

phase angle is −135°. The calculation is: -135° – (-180°) = 45°

In electronic amplifiers, the phase margin (PM) is the difference between the phase lag 相位滞后  φ (< 0) and -180°, for an amplifier’s output signal (relative to its input) at zero dB gain – i.e. unity gain, or that the output signal has the same amplitude as the input.

PM = φ -(-180)

For example, if the amplifier’s open-loop gain crosses 0 dB at a frequency where the phase lag is -135°, then the phase margin of this feedback system is -135° – (-180°) = 45°.

phase margin is measured at the frequency where the open-loop voltage gain of the amplifier equals the desired closed-loop DC voltage gain;

正弦函数的一个周期图。 每个参数值的相位(相对于循环的开始)显示在底部,以 0° 到 360° 的度数和 0 到 2π 的弧度表示, 如下图:

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the loop gain is the difference between the open-loop gain curve and the closed-loop gain curve (actually, the 1/β curve) on a dB scale

?

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Operational Amplifier Clasifications

Current amplifiers receive a current input and produce a current output. Transconductance amplifiers convert a voltage input to a current output. Transresistance amplifiers convert a current input and produces a voltage output.

Transconductance (for transfer conductance)!

Transconductance (for transfer conductance), also infrequently called mutual conductance, is the electrical characteristic relating the current through the output of a device to the voltage across the input of a device. Conductance is the reciprocal of resistance.

Transimpedance跨阻

跨导(用于传输电导),也很少称为互导,是将通过设备输出的电流与设备输入两端的电压相关联的电气特性。 电导是电阻的倒数。

how to measure slew rate

Slew rate is measured by applying a large signal step, such as 1V, to the input of the op amp, and measuring the rate of change from 10% to 90% of the output signal’s amplitude. The data sheet large-signal step response is an indication of the amplifiers slew rate.

What is a good slew rate?

IMG_256

Most amplifiers (even the cheap ones) should have a slew rate above 6.3 V/µs. The seemingly high slew rates of most amplifiers are simply good engineering. Having a slew rate that yields a maximum frequency well above the audible range will pretty much eliminate any potential errors and unwanted distortion whatsoever.

How is CMRR practically measured?

IMG_256

CMRR is usually expressed in dB: Datasheets commonly list CMRR as a dc value, measured by determining the two voltage levels necessary to cause the same output change, first in differential mode and then in common mode.

Ideally, CMRR is infinite. A typical value for CMRR would be 100 dB. In other words, if an op amp had both desired (i.e., differential) and common-mode signals at its input that were the same size, the common-mode signal would be 100 dB smaller than the desired signal at the output.

a high CMRR is good because it defines the difference at the output of an amplified differential mode input to an amplifier common mode input. Unwanted signals that couple into the differential input, predominantly will result in an unwanted common mode signal at the input.

高 CMRR 是好的,因为它定义了放大的差模输入与放大器共模输入的输出之间的差异。 耦合到差分输入的不需要的信号主要会在输入端产生不需要的共模信号 ???

The common-mode rejection ratio (CMRR) of a differential input indicates the capability of the input to reject input signals common to both input leads. … The CMRR is given in decibels (dB) and the higher the CMRR value is, the better.

Practice: CMRR = Gain -.Common Mode Gain ( minus normally)

输入与放大器共模输

Saturation

Output voltage is limited to a minimum and maximum value close to the power supply voltages The output of older op amps can reach to within one or two volts of the supply rails. The output of so-called rail-to-rail op amps can reach to within millivolts of the supply rails when providing low output currents

饱和

输出电压被限制在接近电源电压的最小值和最大值。旧运算放大器的输出可以达到电源轨的一到两伏以内。 当提供低输出电流时,所谓的轨到轨运算放大器的输出可以达到电源轨的毫伏以内

Input capacitance

Most important for high frequency operation because it reduces input impedance and may cause phase shifts

输入电容: 对于高频操作最重要,因为它会降低输入阻抗并可能导致相移;

Input offset voltage

This voltage, which is what is required across the op amp’s input terminals to drive the output voltage to zero.[7][nb 2] In the perfect amplifier, there would be no input offset voltage. However, it exists in actual op amps because of imperfections in the differential amplifier that constitutes the input stage of the vast majority of these devices. Input offset voltage creates two problems: First, due to the amplifier’s high voltage gain, it virtually assures that the amplifier output will go into saturation if it is operated without negative feedback, even when the input terminals are wired together. Second, in a closed loop, negative feedback configuration, the input offset voltage is amplified along with the signal and this may pose a problem if high precision DC amplification is required or if the input signal is very small

输入失调电压:

该电压是运算放大器输入端子上将输出电压驱动为零所需的电压。在完美的放大器中,不会有输入失调电压。 然而,它存在于实际运算放大器中,因为构成绝大多数这些器件的输入级的差分放大器存在缺陷。 输入失调电压会产生两个问题:首先,由于放大器的高电压增益,它实际上确保放大器输出在没有负反馈的情况下工作时会进入饱和状态,即使输入端子连接在一起也是如此。 其次,在闭环、负反馈配置中,输入失调电压与信号一起被放大,如果需要高精度直流放大或输入信号非常小,这可能会带来问题

Phase Margin is the amount of phase shift margin at unity gain which could cause instability or Oscillation.

90 deg is theoretical ideal, 0 is NG , 45 deg will have some overshoot, 60 deg is practical solution. Phase margin shows tradeoff between rise time and overshoot.

相位裕度是单位增益下的,可能导致不稳定或振荡的相移裕量, 90度是理论上的理想,0是NG,45度会有一些过冲,60度是实际的解决方案。 相位裕度显示了上升时间和过冲之间的权衡

Op-amps are used with feedback, this makes it possible for them to oscillate, which is bad unless you are designing an oscillator!

The phase margin basically states how stable the op-amp is, i.e. phase angle distance from the point of oscillation, in the worst-case configuration of unity gain.

The addition of stray input & output capacitance, but especially load capacitance, can cause a phase shift that reduces the stability margin.

Typically a small resistor is added to the output to compensate for a “large” capacitive load, but this of course reduces the effective gain. Input capacitance is usually less of a problem, but it too can be compensated.

Many op-amps are internally compensated for typical usage conditions, but not all are

Many op amp data sheets specify a “capacitive load drive capability”. … For a voltage feedback op amp, capacitive load drive capability increases proportionally with gain. So aVF op amp that can safely drive a 100-pF capacitance at unity gain should be able to drive a 1000-pF capacitance at a gain of 10.

许多运算放大器数据表都指定了“容性负载驱动能力”。 … 对于电压反馈运算放大器,容性负载驱动能力随增益成比例增加。 因此,能够以单位增益安全驱动 100pF 电容的运算放大器应该能够以 10 增益驱动 1000pF 电容

The slew rate is not a characteristic of the waveform, but of the amplifier. Since the slope of the sinusoid depends on the frequency AND the amplitude, the selw rate affects more larger signals than small ones. Smaller signals are more affected by the gain-bandwidth product.

Basic principle. The slew rate of an OTA or op-amp is proportional to the maximum current, usually available from the first stage of the circuit. Increase in the slew rate requires increase in the value of bias current source, which will increase the overall power dissipation of the circuit.

原则上, OTA 或运算放大器的压摆率与最大电流成正比,通常可从电路的第一级获得。 增加压摆率需要增加偏置电流源的值,这将增加电路的整体功耗

 

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